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RESEARCH PAPERS |
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Rajeshwari Pandey
1. "VHDL simulation of ATM Transceiver " Presented in National Conference on Power Electronics & Controls , 3-4 Jan 2003 ,Kerala.
2. " Design and VHDL simulation of error correcting code using CA" presented in National Conference on Microchip Design and Technology, Mar 2003, Delhi. "Image Compression using Cellular Automata" a paper presented in National conference on VLSI Design & Technology organized by Bharati Vidyapeeth's College of Engineering, New Delhi, 15 th & 16 th April 2004
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